Hi @ChUml,
Below is a representative plot of THD.
Below is a representative plot of THD+N
Compared to what was previously posted you can see a lot of clean-up around discontinuities. This is from smarter switching points for the relays.
For loopback, here is THD
And for loopback, here is THD+N
One issue is that the input and output relays need to be configured differently depending on whether you are wanting to optimize for THD or THD+N. For best THD+N, you want the DAC running hot (roughly -5 dBFS for given relay range) and the ADC running at -14 dBFS for given relay range. For best THD, you want the DAC running around -18 dBFS and the ADC running at -20 dBFS.
I think the way this is initially surfaced is that when you select the measurement type (THD or THDN), the last one you select will determine which will be optimized AND you see an annunciator on the screen indicating “THD OPT” or “THDN OPT” for example. But in short, you need a way to tell the system if your goal is to see best THD or best THDN.
Below is a generic breakout board for I2S. On the left side is the connector back to the QA402 (2 row, 1.27mm pitch), in the middle are isolators, etc, and on the right side are the breakout signals on 0.1" headers that you can jumper to whatever you are testing. The IO can be anywhere from 2.5V to 5.5V. We will provide these separately with the SMT parts soldered, and the connectors to be soldered by customer.
